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HD74AC182
Carry Lookahead Generator
REJ03D0258-0200Z (Previous ADE-205-378 (Z)) Rev.2.00 Jul.16.2004
Description
The HD74AC182 is a high-speed carry lookahead generator. It is generally used with the HD74AC181 or HD74AC381 4-bit arithmetic logic unit to provide high-speed lookahead over word lengths of more than four bits.
Features
* Outputs Source/Sink 24 mA * Ordering Information
Part Name HD74AC182FPEL HD74AC182RPEL Package Type SOP-16 pin (JEITA) Package Code Package Abbreviation Taping Abbreviation (Quantity) FP-16DAV FP RP EL (2,000 pcs/reel) EL (2,500 pcs/reel)
SOP-16 pin (JEDEC) FP-16DNV
Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code.
Pin Arrangement
G1 1 P1 2 G0 3 P0 4 G3 5 P3 6 P7 GND 8 (Top view) 16 VCC 15 P2 14 G2 13 Cn 12 Cn+X 11 Cn+y 10 G 9 Cn+z
Rev.2.00, Jul.16.2004, page 1 of 6
HD74AC182
Logic Symbol
P0 G0 Cn
P1 G1
P2 G2
P3 G3 G P
Cn+x
Cn+y
Cn+z
Pin Names
Cn G0, G2 G1 G3 P0, P1 P2 P3 Cn + x to Cn + z G P Carry Input Carry Generate Inputs (Active Low) Carry Generate Input (Active Low) Carry Generate Input (Active Low) Carry Propagate Inputs (Active Low) Carry Propagate Input (Active Low) Carry Propagate Input (Active Low) Carry Outputs Carry Generate Output (Active Low) Carry Propagate Output (Active Low)
Logic Diagram
Cn G0 P0 G1 P1 G2 P2 G3 P3
Cn+x
Cn+y
Cn+z
G
P
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Functional Description
The HD74AC182/HD74ACT182 carry lookahead generator accepts up to four pairs of Active Low Carry Propagate (P0 to P3) and Carry Generate (G0 to G3) signals and an Active High Carry input (Cn) and provides anticipated Active High carries (Cn + x, Cn + y , Cn + z) across four groups of binary adders. The HD74AC182/HD74ACT182 also has Active Low Carry Propagate (P) and Carry Generate (G) outputs which may be used for further level of lookahead. The logic equations provided at the outputs are:
Rev.2.00, Jul.16.2004, page 2 of 6
HD74AC182 Cn + x = G0 + P0Cn Cn + y = G1 + P1G0 + P1P0Cn Cn + z = G2 + P2G1 + P2P1G0 + P2P1P0Cn G = G3 + P3G2 + P3P2G1 + P3P2P1G0 P = P3P2P1P0 Also, the HD74AC182/HD74ACT182 can be used with binary ALUs in an active Low or active High input operand mode. The connections (Figure a) to and from the ALU to the carry lookahead generator are identical in both cases. Carries are rippled between lookahead blocks. The critical speed path follows the circled numbers. There are several possible arrangements for the carry interconnects, but all achieve about the same speed. A 28-bit ALU is formed by dropping the last HD74AC182/HD74ACT182.
Truth Table
Inputs Cn X L X H X X L X X H X X X L X X X H H H L X X H H X L X X X H H X X L X X X X H X X X L H X X X L H: L: X: High Voltage Level Low Voltage Level Immaterial G0 H X X L X H X X X L X X H X X X X L H H H L X X X H H H X L X X X X H H X X L X H X X X L L X H X X X X L L X X H X X X X L X H X X L H H H H L X X X X H H H X L X X H X X X X L L L X H X X X X L L X X H X L H H H H L X X X H X X X X L L L X X X H L P0 G1 P1 G2 P2 G3 P3 L L H H L L L H H H L L L L H H H H H H H H L L L L H H H H L Cn + x Cn + y Outputs Cn + z G P
Rev.2.00, Jul.16.2004, page 3 of 6
HD74AC182
Absolute Maximum Ratings
Item Supply voltage DC input diode current DC input voltage DC output diode current DC output voltage DC output source or sink current DC VCC or ground current per output pin Storage temperature Symbol VCC IIK VI IOK VO IO ICC, IGND Tstg Ratings -0.5 to 7 -20 20 -0.5 to Vcc+0.5 -50 50 -0.5 to Vcc+0.5 50 50 -65 to +150 Unit V mA mA V mA mA V mA mA C Condition VI = -0.5V VI = Vcc+0.5V VO = -0.5V VO = Vcc+0.5V
Recommended Operating Conditions
Item Supply voltage Input and output voltage Operating temperature Input rise and fall time (except Schmitt inputs) VIN 30% to 70% VCC Symbol VCC VI, VO Ta tr, tf Ratings 2 to 6 0 to VCC -40 to +85 8 V V C ns/V VCC = 3.0V VCC = 4.5 V VCC = 5.5 V Unit Condition
DC Characteristics
Item Symbol VIH Vcc (V) 3.0 4.5 5.5 VIL 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 VOL 5.5 3.0 4.5 5.5 3.0 4.5 Input leakage current Dynamic output current* IIN IOLD IOHD 5.5 5.5 5.5 5.5 min. 2.1 3.15 3.85 -- -- -- 2.9 4.4 5.4 2.58 3.94 4.94 -- -- -- -- -- -- -- -- -- Ta = 25C typ. 1.5 2.25 2.75 1.50 2.25 2.75 2.99 4.49 5.49 -- -- -- 0.002 0.001 0.001 -- -- -- -- -- -- max. -- -- -- 0.9 1.35 1.65 -- -- -- -- -- -- 0.1 0.1 0.1 0.32 0.32 0.32 0.1 -- -- Ta = -40 to +85C min. 2.1 3.15 3.85 -- -- -- 2.9 4.4 5.4 2.48 3.80 4.80 -- -- -- -- -- -- -- 86 -75 -- max. -- -- -- 0.9 1.35 1.65 -- -- -- -- -- -- 0.1 0.1 0.1 0.37 0.37 0.37 1.0 -- -- 80 A mA mA A V VOUT = 0.1 V or VCC -0.1 V Unit Condition
Input Voltage
V
VOUT = 0.1 V or VCC -0.1 V
Output voltage
VOH
VIN = VIL or VIH IOUT = -50 A VIN = VIL or VIH IOH = -12 mA IOH = -24 mA IOH = -24 mA VIN = VIL or VIH IOUT = 50 A VIN = VIL or VIH IOL = 12 mA IOL = 24 mA IOL = 24 mA VIN = VCC or GND VOLD = 1.1 V VOHD = 3.85 V VIN = VCC or ground
Quiescent supply 5.5 -- -- 8.0 ICC current *Maximum test duration 2.0 ms, one output loaded at a time.
Rev.2.00, Jul.16.2004, page 4 of 6
HD74AC182
AC Characteristics
Ta = +25C CL = 50 pF Item Propagation delay Pn to P Propagation delay Pn to P Propagation delay Cn to Cn + x, y, z Propagation delay Cn to Cn + x, y, z Propagation delay Pn or Gn to Cn + x, y, z Propagation delay Pn or Gn to Cn + x, y, z Note: Symbol tPLH tPHL tPLH tPHL tPLH tPHL VCC (V)*1 Min 3.3 1.0 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Typ 8.0 5.5 8.0 5.5 9.5 7.5 9.0 7.0 10.5 8.0 11.5 9.0 Max 10.5 8.0 10.5 8.0 12.0 10.0 12.0 10.0 13.0 10.5 14.0 11.5 Ta = -40C to +85C CL = 50 pF Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 11.5 9.0 11.5 9.0 13.0 11.0 13.0 11.0 14.0 11.5 15.5 12.5 Unit ns ns ns ns ns ns
1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V
Capacitance
Item Input capacitance Power dissipation capacitance Symbol CIN CPD 4.5 50.0 Typ pF pF Unit VCC = 5.5 V VCC = 5.0 V Condition
Rev.2.00, Jul.16.2004, page 5 of 6
HD74AC182
Package Dimensions
As of January, 2003
10.06 10.5 Max 16 9
5.5
Unit: mm
1
*0.20 0.05
8
0.80 Max
2.20 Max
0.20 7.80 + 0.30 -
1.15
1.27
0.10 0.10
0 - 8
0.70 0.20
*0.40 0.06
0.15
0.12 M
Package Code JEDEC JEITA Mass (reference value) FP-16DAV -- Conforms 0.24 g
*Ni/Pd/Au plating
As of January, 2003
Unit: mm
9.9 10.3 Max 16 9
3.95
1 1.27 0.635 Max
8
0.11 0.14 + 0.04 - 1.75 Max
*0.20 0.05
0.10 6.10 + 0.30 -
1.08
0 - 8
+ 0.67 0.60 - 0.20
*0.40 0.06
0.15 0.25 M
*Ni/Pd/Au plating
Package Code JEDEC JEITA Mass (reference value)
FP-16DNV Conforms Conforms 0.15 g
Rev.2.00, Jul.16.2004, page 6 of 6
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